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Synopsys and GLOBALFOUNDRIES Collaborate to Develop DesignWare IP for ...

Sep 20, 2017 - DesignWare Interface and Analog IP Enables Faster Time-to-Volume for Energy-Efficient IoT and Mobile SoCs

Synopsys Design Platform Certified by GLOBALFOUNDRIES for 22nm FD-SOI Process...

Sep 20, 2017 - Certification Enables Optimized Implementation and Predictable Signoff

Intel Custom Foundry Certifies Synopsys Design Platform for Intel’s 22nm ...

Sep 19, 2017 - Comprehensive Foundry Reference Flow Leverages Industry-leading IC Compiler II

Brite Semiconductor, SMIC and Synopsys Collaborate to Deliver Low Power ...

Sep 18, 2017 - IoT Platform Accelerates Designs for IoT Edge Devices with Synopsys Silicon-Proven ARC Data Fusion IP Subsystem, Brite ASIC Design Services and SMIC 55-nm Ultra-Low Power Process

Synopsys Strengthens Design-Technology Co-Optimization Solution with ...

Sep 18, 2017 - Materials Modeling Enables Semiconductor Manufacturers to Save Time and Cost for Advanced Process Node Development

TSMC Recognizes Synopsys with Four Partner Awards at the Open Innovation ...

Sep 18, 2017 - TSMC Awards recognize Synopsys' Collaboration on Interface IP, Joint Development of 7nm FinFET Plus and 12FFC Design Infrastructures and Joint Delivery of an Automotive Design ...

Synopsys IC Compiler II Certified for TSMC’s Advanced 7-nm FinFET Plus Node

Sep 11, 2017 - Platform-Wide Certification for TSMC’s Latest Advanced-Process Technology

Synopsys' IC Compiler II Completes Certification for TSMC's 12-nm Process ...

Sep 11, 2017 - Platform-Wide Enhancements Across Digital and Custom Design Tools Deliver a Production-Ready Flow

Samsung SARC Selects Synopsys as Primary Verification Solution for Advanced ...

Sep 5, 2017 - Comprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power CPU, GPU and System IP for Mobile SoCs

Best Practices for FPGA Design Coding, Timing and Congestion Reduction

Oct 18, 2017 - Learn tips on design coding, constraint definition, timing closure and how to reduce design congestion for faster turn-around-times using Synplify Premier.