Ravindra Aneja, Senior Staff Program Manager at Synopsys, demonstrates some of VC Formal’s key features that enable faster convergence and help with Formal signoff.
Nov 13, 2017 - Partnership Enables Advancement of ZeBu Server as the Leading SoC Emulation Tool for the Automotive Industry
Oct 26, 2017 - This Tech Talk highlights the challenges of EV/HEV design and demonstrates a virtual prototyping solution using Saber, allowing for system level and detailed design of Hybrid and ...
Oct 23, 2017 - Comprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power RISC-V Processors and SoCs
Oct 18, 2017 - New Virtualizer Design Kits Enable Automotive Tier 1 and OEM Companies to Start Software Development, Integration and Test Before Silicon
Oct 11, 2017 - Learn how CustomSim performs advanced Monte Carlo analysis using key features such as multiple sampling schemes, scope control using .variation block, Monte Carlo within ...
Oct 05, 2017 - Native SystemVerilog USB VIP Features Built-in Coverage, Verification Plan, Protocol-Aware Debug and Source Code Test Suites
Learn about some interesting methods to analyze the quality of compression algorithms, in addition to observations about VESA Display Stream Compression using these algorithms. - October 2017
Accelerate Automotive Systems and Software Testing
Sep 5, 2017 - Comprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power CPU, GPU and System IP for Mobile SoCs