Verification Resources

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Synthesis of SystemVerilog RTL Constructs

Dec 20, 2019 - This webinar will help you understand the new synthesizable RTL constructs including the three new types of always blocks, priority, unique, wild equality, case inside, inside ...

Faster Verification Closure from IP to SoC Using the Verification Continuum ...

Dec 4, 2019 - The webinar delves into how the Synopsys end-to-end verification strategy scales from IP-level functional verification to full system-level validation & performance analysis using ...

QTronic User Conference 2019

Dec 02, 2019 - Following the great success of the QTronic User Conference 2018, QTronic invites to the second conference on virtual ECUs and Applications in automotive software development.

Networking SoC Pre-Silicon Verification with Ixia IxVerify Test Solution and ...

This white paper focuses on the challenges of pre-silicon verification for networking SoCs, considers some options and describes a state-of-the-art solution that centers on the Synopsys ZeBu Server...

Synopsys Completes Acquisition of DINI Group

Nov 15, 2019 - Synopsys announces its acquisition of DINI Group, an established leader in FPGA-based boards and solutions, headquartered in La Jolla, California.

Faster Software Development using Hybrid Prototyping over PCIe Real World ...

Nov 13, 2019 - What if you could perform early embedded software development and HW-SW co-validation at 125MHz FPGA-based prototyping speed with the debugging flexibility of virtual prototyping?

Getting Feedback in Minutes: Using a Virtual ECU to Accelerate Automotive ...

Nov 12, 2019 - Apart from sketching the technical foundation for virtual ECUs, this 30-minute Webinar covers recent applications from the powertrain, chassis, and ADAS/AV domain, all based on the ...

Using PCIe Real World Interface for High-Speed Hybrid Prototyping

This white paper highlights a novel approach to hybrid prototyping using a PCIe interface between the HAPS® FPGA-based prototyping and the Virtualizer® virtual prototyping. - November 2019

Synopsys VC LP for Low Power Signoff Verification Delivers Up To 5X Runtime ...

Nov 07, 2019 - Samsung adopts the Synopsys VC LP for low-power signoff and static verification to minimize costly design iterations for large-scale, complex System-on-Chip (SoC) designs.

Synopsys and AMD Execute Multi-Year ZeBu Emulation Agreement

Oct 30, 2019 - New agreement includes optimization of ZeBu and VCS software for AMD EPYC processor-based servers.