Verification Resources

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Accelerate Functional Safety Certification of IP and SoC Designs - Part 1

Jun 22, 2021 - This Synopsys webinar series will cover a high-level introduction to Synopsys FuSa solutions including Z01X and VC Formal that address complex IP challenges.

Using Control Connectivity Checks to Expand Low-Power Signoff

Jun 15, 2021 - Learn custom low power mechanisms using Synopsys VC LP that help capture user intent of complex low power cells control signal connectivity.

Improve Your Software Team’s Productivity and Efficiency with Fast Virtual ...

Jun 10, 2021 - Learn how virtual prototypes can be connected to real and virtual devices to provide the wider environment required to effectively test software.

Successful Strategies to Verify Clock Gating using VC Formal - Part 2

Jun 09, 2021 - By the end of this Synopsys webinar, you will be able to uncover corner case clock gating bugs that are difficult to verify with simulation.

Find and Fix Bugs Early with Correct-by-Construction Coding with Synopsys ...

Jun 02, 2021 - A demonstration of how design and verification iterations can be significantly reduced and major project milestones can be achieved substantially faster using the Synopsys Euclide ...

HAPS Ecosystem – The Swiss Knife of Interfaces for FPGA Prototyping

May 19, 2021 - Learn the various protocol interfaces and system modeling solutions supported by HAPS systems through its extensive portfolio of accessory cards, speed adaptors, DesignWare IPKs (IP ...

Achieving Faster Closure using Advanced RTL Static Signoff Platform

Apr 29, 2021 - This Synopsys webinar delves into challenges of a typical static solution as a point tool and how VC SpyGlass RTL signoff solution can help address these challenges.

Successful Strategies to Verify Clock Gating using VC Formal - Part 1

Apr 28, 2021 - This Synopsys webinar shares real-life examples of how to execute clock gating verification with a well-defined methodology using the Synopsys VC Formal Sequential Equivalence ...

Verdi - Unified Debug System: Tips for debugging and Introduction to Verdi ...

Mar 24, 2021 - This Synopsys Webinar provides tips for debugging and an introduction to Verdi Ultra, a unified debug system.

The Future is Virtual for Automotive Electronic System Software Development

Mar 09, 2021 - This Tech Talk provides an overview on how virtual prototyping accelerates a “Shift Left” and “Software First” perspective in automotive software development and test.