SNUG 2018 Verification Lunch Panel: SoC Leaders Verify with Synopsys
Johannes Stahl speaks about the ongoing collaborations between Synopsys and leading SoC companies. David Bural (Texas Instruments) addresses unique verification challenges of embedded processors ...
DVCon 2018 Verification Lunch Panel
Feb 27, 2018 - Synopsys hosted a verification panel at DVCon 2018 that included presentations from Qualcomm and Broadcom as well as an update on the next wave of verification innovation in ...
How Good is Your Next Android SoC? Predict Performance and Power Using Task ...
Get a 30 second preview of a webinar where we review how application workload models, called task graphs, enable designers of Android based systems to capture the processing and communication ...
VC Formal Features for Faster Convergence
Ravindra Aneja, Senior Staff Program Manager at Synopsys, demonstrates some of VC Formal’s key features that enable faster convergence and help with Formal signoff.
Debugging Complex PCIe Issues using Synopsys VIP and Verdi Transaction Debug
Varun Sundaran, Senior CAE, demonstrates the debugging of PCIe Gen4 using Synopsys VIP and Verdi debug at the 2017 PCI-SIG Developers Conference.
SNUG 2017 Verification Lunch Panel: Spreadtrum
Bravo Lee and Jeffery Liao share how Spreadtrum used Virtualizer and ZeBu to speed verification and software bring-up of a 14nm, 8-core, 64-bit LTE SoC platform.
SNUG 2017 Verification Lunch Panel: Wave Computing
Bruno Bratti shares how Wave Computing is using ZeBu to address the unique hardware and software verification challenges of machine learning silicon
SNUG 2017 Verification Lunch Panel: SoC Leaders Verify with Synopsys
On March 22, 2017 Synopsys hosted a luncheon event at the annual Synopsys Users Group (SNUG) event in Santa Clara, CA. At this event, Tom Borgstrom spoke about the ongoing collaborations between ...
Casual is the New Formal (series)
The Synopsys Verification Group invites you to learn more about Formal Verification, in our new video blog series: Casual is the New Formal. The videos provide an introduction to Formal ...
2016 HSPICE SIG Event: Verifying Signal and Power Integrity for Robust Design
On January 20, 2016, Synopsys hosted an HSPICE SIG Event in Santa Clara, CA. At this event, industry leaders spoke about their experiences using HSPICE to verify signal and power integrity for ...