Jun 10, 2020 - In this webinar, we will talk about an automated testbench solution to address the challenge of NoC verification.
Jun 08, 2020 - IntelliProp integrates Synopsys VC VIP, Verdi and VCS to meet aggressive design schedule for memory controller.
This white paper explains the updates in DDR5 technology that have been made to support high performance computing. - April 2020
Mar 25, 2020 -Synopsys announces that SiFive, Inc. has selected Synopsys Fusion Design Platform™ and Verification Continuum® platform to enable rapid cloud-based design of next-generation customer ...
Mar 23, 2020 - Synopsys announces VC VIP for Ethernet 800G, based on the Ethernet Technology Consortium (ETC) specification, enabling SoC teams to design networking chips for data centers with ease.
This white paper describes the use of the industry-leading Synopsys Verification Continuum™ Platform solution and shows how it can be used to verify a real-world design. - December 2019
Dec 4, 2019 - The webinar delves into how the Synopsys end-to-end verification strategy scales from IP-level functional verification to full system-level validation & performance analysis using ...
May 30, 2019 - New native tool integrations enable up to 5X higher verification performance.
May 1, 2019 - Synopsys announces the availability of the industry’s first verification IP (VIP) for Non-Volatile Dual In-line Memory Module (NVDIMM-P) for DDR5/4.
Mar 14, 2019 - Native SystemVerilog VIP for USB Features Built-in Coverage, Verification Plan, Protocol-Aware Debug, and Source Code Test Suites