Jun 05, 2019 - Faraday Technology Corporation, a leading fabless ASIC and IP provider, adopted Synopsys SpyGlass® Design Handoff Kit.
May 30, 2019 - New native tool integrations enable up to 5X higher verification performance.
May 23, 2019 - The DPV app leverages proven HECTOR™ technology to deliver exhaustive formal verification closure on datapath-intensive designs during the design and verification cycle for broad ...
Aug 27, 2018 - A state-of-the-art artificial intelligence (AI) enabled formal verification app, Regression Mode Accelerator, as part of the Synopsys VC Formal® solution
Oct 23, 2017 - Comprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power RISC-V Processors and SoCs
Sep 5, 2017 - Comprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power CPU, GPU and System IP for Mobile SoCs
Jun 28, 2017 - VC Formal Delivers Faster Convergence for Complex Multi-Functional Product Designs
Jun 15, 2017 - Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs
Jun 7, 2017 - VC Formal’s high performance, capacity and robust engines enabled ST to locate corner case bugs earlier in the design cycle,.
Mar 21, 2017 - Bitcoin-mining Design-based Kit Features Complete RTL-to-GDSII Low Power Methodology