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Scaling Simulation

May 27, 2021 - Design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job.

Silo Busting In The Design Flow

Nov 24, 2020 - Learn more about how Waterfall development flows no longer work for chip design, but unified tool flows may not be the answer.

Efficient Low Power Verification & Debug Methodology Using Power-Aware ...

Dec 13, 2018 - This article discusses using the capabilities of a power aware simulator coupled with an intuitive and powerful debug to ensure that subtle bugs do not escape silicon.