Verification Resources

Sort by

Synopsys Suggests

Using Control Connectivity Checks to Expand Low-Power Signoff

Jun 15, 2021 - Learn custom low power mechanisms using Synopsys VC LP that help capture user intent of complex low power cells control signal connectivity.

Perform Multi-Voltage Checks Faster with Low Power Signoff

Sep 16, 2020 - This Synopsys webinar will highlight the benefits of tight integration between P&R and low power signoff tools.

SiFive Selects Synopsys Fusion Design Platform and Verification Continuum ...

Mar 25, 2020 -Synopsys announces that SiFive, Inc. has selected Synopsys Fusion Design Platform™ and Verification Continuum® platform to enable rapid cloud-based design of next-generation customer ...

Accelerate Low Power Static Verification with New Technologies in Synopsys VC...

Jan 22, 2019 - This webinar introduces three techniques in Synopsys VC LP to tackle design verification for low power designs.

AI-enabled Root Cause Analysis for Low Power Verification

Jul 30, 2019 - This webinar will talk about the current application of deterministic and machine learning-based techniques to automatically identify the accurate root-causes for a related group of ...

Accurate Power Analysis Using Real Software Workloads

Jul 16, 2019 - Most chip designs now employ low-power design techniques, making accurate estimates of power consumption necessary.

Synopsys Low Power Workshop Offers Breadth and Depth

Jun 18, 2019 - Learn about power management for both chip verification and implementation, the emerging importance of pre-RTL UPF checks and the scalability of UPF for large designs.

Shift-Left Low Power Verification With UPF Information Model

May 30, 2019 - How to use UPF information model APIs to write re-usable low power testbenches that can monitor and control UPF objects.

An Efficient Hierarchical Verification Flow for Low Power Designs

Feb 21, 2019 - In this webinar, we will cover the benefits of SAM flow, such as the 8X-15X runtime performance gain and reduced memory consumption compared to the full flat verification, all while ...

Efficient Hierarchical Verification For Low Power Designs

Jan 17, 2019 - This article discusses how tools using new hierarchical verification technologies, such as Synopsys Low Power Verification, enable a “shift-left” in the overall verification TAT and ...