Verification Resources

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Accelerate Low Power Static Verification with New Technologies in Synopsys VC...

Jan 22, 2019 - This webinar introduces three techniques in Synopsys VC LP to tackle design verification for low power designs.

AI-enabled Root Cause Analysis for Low Power Verification

Jul 30, 2019 - This webinar will talk about the current application of deterministic and machine learning-based techniques to automatically identify the accurate root-causes for a related group of ...

An Efficient Hierarchical Verification Flow for Low Power Designs

Feb 21, 2019 - In this webinar, we will cover the benefits of SAM flow, such as the 8X-15X runtime performance gain and reduced memory consumption compared to the full flat verification, all while ...

Efficient Low Power Verification and Debug Methodology Using Power Aware ...

Dec 5, 2018 - This webinar will share a methodology for efficient low power verification and debug enabling “shift-left” and ensuring that subtle bugs do not escape to silicon.