Verification Resources

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Formal Datapath Verification

Drill down into how to achieve confidence in datapath designs by applying formal solvers and methods to data transformation areas of a design rather than the control path areas.

Formal Signoff

What’s good enough coverage? What makes one assertion better than another? Find out in this video as well as where the potential holes are in verification.

VC Formal Features for Faster Convergence

Ravindra Aneja, Senior Staff Program Manager at Synopsys, demonstrates some of VC Formal’s key features that enable faster convergence and help with Formal signoff.

DAC 2018 Verification Lunch Panel

Jun 26, 2018 - Synopsys hosted a luncheon event at DAC in San Francisco, California. At this event, industry leaders ST, AMD, and Samsung shared their viewpoints on what is driving SoC complexity, ...

DVCon 2016 Verification Lunch Panel: Industry Leaders Verify with Synopsys

On March 3, 2016, Synopsys hosted a luncheon event at DVCon in San Jose, CA. During the event, Michael Sanie, senior director of verification marketing at Synopsys, highlighted the next wave of ...

DVCon 2018 Verification Lunch Panel

Feb 27, 2018 - Synopsys hosted a verification panel at DVCon 2018 that included presentations from Qualcomm and Broadcom as well as an update on the next wave of verification innovation in ...

DVCon US 2019 Verification Lunch Panel

Feb 28, 2019 - Industry experts from Arm and NXP share their viewpoints on what is driving SoC complexity, how their teams have achieved success, how you can apply their insights on your next ...

SNUG 2016 Verification Lunch Panel: Networking Trends Driving New ...

On March 30, 2016, Synopsys hosted a luncheon event at the annual Synopsys Users Group (SNUG) event in Santa Clara, CA. Industry leaders Cisco, Ericsson and Cavium shared their insights on ...

SNUG 2018 Verification Lunch Panel: SoC Leaders Verify with Synopsys

Johannes Stahl speaks about the ongoing collaborations between Synopsys and leading SoC companies. David Bural (Texas Instruments) addresses unique verification challenges of embedded processors ...

SNUG 2019 Verification Lunch Panel

Synopsys hosted a luncheon event at the annual SNUG that highlighted new verification solutions for ZeBu Server 4, HAPS-80 Desktop Prototyping and VC Formal Regression Mode Accelerator App.