Verification Resources

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Accelerate SSD Software Development And System Validation

Feb 28, 2019 - Start development early on the complex firmware required by next generation SSDs.

Accelerated Verification with Synopsys

Jul 17, 2018 - At DAC 2018, Synopsys held a lunch panel discussing verification challenges faced by the industry leaders, their adopted approaches and the overall verification technology trends.

Accurate Power Analysis Using Real Software Workloads

Jul 16, 2019 - Most chip designs now employ low-power design techniques, making accurate estimates of power consumption necessary.

Architecting an ML Design

Aug 14, 2018 - Learn how hardware design methods can advance building machine learning systems.

Artificial Intelligence: Let Us Get The Math Right First!

Jun 6, 2019 - Data path verification with formal for artificial intelligence (AI) designs.

Beyond Debug - FPGAs for Fun and Prototyping

Nov 20, 2015 - In this week’s episode of Fish Fry we’re letting loose some LUTs, bringing up the bitstream, and cramming in some configuration with Mick Posner from Synopsys. Mick joins Fish Fry to...

Debug Issues Grow At New Nodes

Jul 26, 2018 - Finding the root cause of problems becoming more difficult as systemic complexity rises; methodology and different approaches play an increasingly important role.

Debugging is the whole point of prototyping

Apr 15, 2016 - The prototype is obviously the end goal of FPGA-based prototyping, however success of the journey relies on how quickly defects can be found and rectified. Winning in the debug phase...

Don’t Have A Meltdown Over A Spectre In Your SoC

Mar 7, 2019 - Verifying that there are no bugs in the hardware that cause secure data leaks will help you avoid a meltdown.

Efficient Hierarchical Verification For Low Power Designs

Jan 17, 2019 - This article discusses how tools using new hierarchical verification technologies, such as Synopsys Low Power Verification, enable a “shift-left” in the overall verification TAT and ...