Apr 11, 2019 - Learn how to address the 3 primary verification challenges of complex SoCs: reducing the effort to find the time window around the root cause of a test failure, reproducing the root ...
Mar 12, 2019 - This article explains exascale debug and how the Synopsys ZeBu emulation system can cut debug time after a failure has been reported during a multi-billion cycles regression.
Mar 7, 2019 - Verifying that there are no bugs in the hardware that cause secure data leaks will help you avoid a meltdown.
Feb 28, 2019 - Start development early on the complex firmware required by next generation SSDs.
Jan 17, 2019 - This article discusses how tools using new hierarchical verification technologies, such as Synopsys Low Power Verification, enable a “shift-left” in the overall verification TAT and ...
Dec 13, 2018 - This article discusses using the capabilities of a power aware simulator coupled with an intuitive and powerful debug to ensure that subtle bugs do not escape silicon.
Dec 3, 2018 - This article discusses the verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs.
Oct 11, 2018 - A low power methodology using a combination of static and dynamic verification.
Sep 12, 2018 - Here's a method for improving EMI performance through simulation during the product design phase. This will ultimately reduce the cost of hardware verification and improve productivity.
Sep 11, 2018 - Powersys had the chance to interview Alain Sanchez, IMD-Industrial & Marine Drives, Product Technician at Ingeteam. In this interview, Alain discusses the benefits of using SaberRD ...