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MOS Device Aging Analysis with HSPICE and CustomSim

MOS Reliability Analysis (MOSRA) in HSPICE and CustomSim offers a robust and economic alternative to empirical overdesign and extensive lifetime testing. - Bogdan Tudor, Joddy Wang, Weidong Liu, ...

Automated Regression for Mixed-Signal Verification

CustomExplorer™ Ultra represents the next generation in mixed-signal verification environment, including regression management, debug and analysis for complex SoC design. - Duncan McDonald, Product...

Using Digital Verification Techniques on Mixed-signal SoCs with CustomSim and...

A case study that explains the various aspects of a scalable and reusable methodology for verifying analog IP that can be applied to VMM/UVM, from verification planning to testbench implementation ...

Accelerating Analog Simulation with HSPICE Precision Parallel Technology

HSPICE Precision Parallel technology is a new multicore transient simulation extension to HSPICE for both pre- and post-layout of complex analog circuits such as PLLs, ADCs, DACs, SERDES, and other...

Utilizing Digital Techniques for Analog and Mixed-Signal Verification

The ability of CustomSim to co-simulate with Synopsys’ VCS digital simulator opens up the possibility of a “best of both worlds” approach enabling the majority of the chip to be simulated in the ...

Debugging SuperSpeed USB Software Using Virtual Prototypes

Software is a critical component for the development of USB-based designs. In efforts to start software development early and to make it as productive as possible, design teams are often utilizing ...

Extraction Techniques for High-performance, High-capacity Simulation

Today’s advanced process technologies and faster time-to-market schedules are pushing the limits of verification tools. Post-layout simulation runtimes are increasing 2-4x with every new process ...

Low Power Verification for Multi-rail Cells

Multi-voltage designs have become increasingly common in order to achieve low power. Multiple supply rails are an essential part of multi-voltage designs. Assuming that all output pins in a logic ...

Model Based Design of Robust Vehicle Power Networks

By mandate of the Engineering Meetings Board, this paper has been approved for SAE publication upon completion of a peer review process by a minimum of three (3) industry experts under the ...

Modeling and Simulating a VVT System for Robust Design

By mandate of the Engineering Meetings Board, this paper has been approved for SAE publication upon completion of a peer review process by a minimum of three (3) industry experts under the ...