Apr 29, 2020 - See new formal signoff metrics and how VC Formal enables users to achieve verification completeness.
Apr 16, 2020 - This Tech Talk discusses how virtual prototypes can help with the systematic testing of the correct handling of power faults by the software.
Apr 14, 2020 - This webinar presents a methodology to effectively verify the functional safety logic implemented by Synplify Premier at the early stages of the design flow using fault ...
Apr 01, 2020 - This webinar will discuss how too much debug information can impact runtime performance and how faster, smarter debug can aid in improving productivity.
Mar 25, 2020 - The standardization of UVM under IEEE 1800.2-2017 incorporates some significant changes to the Accellera UVM version 1.2 - Synopsys VCS simulator is used to illustrate these changes.
Mar 25, 2020 - See how much more you can do with formal verification and how efficient it is to uncover corner case bugs that are difficult to verify with simulation.
Mar 10, 2020 - Learn about the latest thinking in EV transmission engineering and the vital testing and simulation that accompany these efforts.
Feb 05, 2020 - This webinar explores Fine-Grained Parallelism (FGP) as one technology to improve performance by parallelizing the simulation across available cores.
Jan 22, 2019 - This webinar introduces three techniques in Synopsys VC LP to tackle design verification for low power designs.
Jan 21, 2020 - This webinar will explain a very robust solution that promises to address all these challenges, and also provides a very powerful debug mechanism using the best of both static and ...