Verification Resources

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Demonstration of the Synopsys Verification IP and Controller IP Core for PCIe...

Marrian Fujinami, Senior AE, demonstrates PCIe 5.0 simulation and debug of the Synopsys VIP and IIP using the Verdi tool at the 2018 PCI-SIG Developers Conference.

SNUG 2018 Verification Lunch Panel: SoC Leaders Verify with Synopsys

Johannes Stahl speaks about the ongoing collaborations between Synopsys and leading SoC companies. David Bural (Texas Instruments) addresses unique verification challenges of embedded processors ...

DVCon 2018 Verification Lunch Panel

Feb 27, 2018 - Synopsys hosted a verification panel at DVCon 2018 that included presentations from Qualcomm and Broadcom as well as an update on the next wave of verification innovation in ...

How Good is Your Next Android SoC? Predict Performance and Power Using Task ...

Get a 30 second preview of a webinar where we review how application workload models, called task graphs, enable designers of Android based systems to capture the processing and communication ...

VC Formal Features for Faster Convergence

Ravindra Aneja, Senior Staff Program Manager at Synopsys, demonstrates some of VC Formal’s key features that enable faster convergence and help with Formal signoff.

Debugging Complex PCIe Issues using Synopsys VIP and Verdi Transaction Debug

A Synopsys VIP expert demonstrates the debugging of PCIe 4.0 using Synopsys VIP and Verdi debug at the 2017 PCI-SIG Developers Conference.

Casual is the New Formal (series)

The Synopsys Verification Group invites you to learn more about Formal Verification, in our new video blog series: Casual is the New Formal. The videos provide an introduction to Formal ...

Synopsys HAPS Prototyping System Handling

Learn about best practices for handling HAPS FPGA-based prototyping systems, including electro-static discharge (ESD), daughterboard insertion and removal and a proper work environment. - Synopsys,...

Safe Unpacking and Packing of Synopsys HAPS Prototyping Systems

Rajkumar Methuku, Staff CAE, demonstrates proper unpacking and packing of Synopsys HAPS systems, including setup of a proper ESD safe work area. - Rajkumar Methuku, Staff Corporate Applications ...

Introducing Synopsys HAPS-80

Learn about Synopsys’ newest FPGA-based prototyping solution, the HAPS-80 Series. HAPS-80 delivers up to 100 MHz system performance and reduces time to first prototype to less than two weeks. - ...