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IMS MicroApp Video: Causality Considerations for Multi-Gigabit StatEye Analysis

Mike Heimlich, AWR Corp., Ted Mido and Scott Wedge, Synopsys present "Causality Considerations for Multi-Gigabit StatEye Analysis" as part of the IEEE.tv showcase of MicroApps seminars from the ...

Faraday Extends SoC Design Services to Include Virtual Prototyping Solution ...

Jan 05, 2017 - SoReal! Virtual Platform Accelerates Software Development 12 Months before Hardware Availability

FPGA Prototyping Gains Ground

Aug 25, 2016 - The popular design methodology enables more sophisticated hardware/software verification before first silicon becomes available.

Powerful New Standard

Feb 11, 2016 - A new version of IEEE 1801 enables complete power-aware flows to be constructed using a meet-in-the-middle concept. What will it mean to you and what new parts of the flow will it ...

Formal Fundamentals: What’s Hiding Behind Your Constraints

Jul 17, 2018 - The reason we need constraints or assumptions in the first place is to limit the behavior/functionality that the formal tool analyzes to the design’s “legal” states/subset. We don’t ...

Rohde & Schwarz LTE Forum Recap

See the highlights from the LTE showing who attended and what the hot topics were for the LTE community. (Length: 5 mins)

Featured Algorithm Video: Introduction to SPW and the LTE/LTE-A Library

This video provides an insight into the overall structure of the LTE / LTE-A Library, its appearance within the SPW block-diagram based design canvas and its modular structure which allows easy ...

SpyGlass CDC/RDC Update - Japanese

Aug 30, 2016 - Learn about SpyGlass CDC and RDC updates including introduction of new key feature "Smart Netlist Verification".

Getting Feedback in Minutes: Using a Virtual ECU to Accelerate Automotive ...

Nov 12, 2019 - Apart from sketching the technical foundation for virtual ECUs, this 30-minute Webinar covers recent applications from the powertrain, chassis, and ADAS/AV domain, all based on the ...

Synopsys Announces Industry’s First DDR5 NVDIMM-P Verification IP for ...

May 1, 2019 - Synopsys announces the availability of the industry’s first verification IP (VIP) for Non-Volatile Dual In-line Memory Module (NVDIMM-P) for DDR5/4.